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NV25040MUW - EEPROM

Download the NV25040MUW datasheet PDF. This datasheet also covers the NV25010MUW variant, as both devices belong to the same eeprom family and are provided as variant models within a single manufacturer datasheet.

Description

The NV25010/20/40 are a EEPROM Serial 1/2/4

Automotive Grade 1 devices internally organized as 128x8/256x8/512x8 bits.

byte page write buffer and support the Serial Peripheral Interface (SPI) protocol.

The device is enabled through a Chip Select (CS) input.

Features

  • Automotive AEC.
  • Q100 Grade 1 (.
  • 40°C to +125°C) Qualified.
  • 10 MHz SPI Compatible.
  • 1.8 V to 5.5 V Supply Voltage Range.
  • SPI Modes (0,0) & (1,1).
  • 16.
  • byte Page Write Buffer.
  • Self.
  • timed Write Cycle.
  • Hardware and Software Protection.
  • Block Write Protection.
  • Protect 1/4, 1/2 or Entire EEPROM Array.
  • Low Power CMOS Technology.
  • 1,000,000 Program/Erase Cycles.
  • 100 Year.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (NV25010MUW-ONSemiconductor.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by onsemi

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
EEPROM Serial 1/2/4-Kb SPI Automotive Grade 1 in Wettable Flank UDFN8 Package NV25010MUW, NV25020MUW, NV25040MUW Description The NV25010/20/40 are a EEPROM Serial 1/2/4−Kb SPI Automotive Grade 1 devices internally organized as 128x8/256x8/512x8 bits. They feature a 16−byte page write buffer and support the Serial Peripheral Interface (SPI) protocol. The device is enabled through a Chip Select (CS) input. In addition, the required bus signals are a clock input (SCK), data input (SI) and data output (SO) lines. The HOLD input may be used to pause any serial communication with the NV25010/20/40 device. These devices feature software and hardware write protection, including partial as well as full array protection.
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