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HC126A - Quad 3-State Noninverting Buffers

Download the HC126A datasheet PDF. This datasheet also covers the HC125A variant, as both devices belong to the same quad 3-state noninverting buffers family and are provided as variant models within a single manufacturer datasheet.

Features

  • Output Drive Capability: 15 LSTTL Loads.
  • Outputs Directly Interface to CMOS, NMOS, and TTL.
  • Operating Voltage Range: 2.0 to 6.0 V.
  • Low Input Current: 1.0 mA.
  • High Noise Immunity Characteristic of CMOS Devices.
  • In Compliance with the JEDEC Standard No. 7 A Requirements.
  • Chip Complexity: 72 FETs or 18 Equivalent Gates.
  • NLV Prefix for Automotive and Other.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HC125A-ONSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number HC126A
Manufacturer onsemi
File Size 208.07 KB
Description Quad 3-State Noninverting Buffers
Datasheet download datasheet HC126A Datasheet

Full PDF Text Transcription

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MC74HC125A, MC74HC126A Quad 3-State Noninverting Buffers High−Performance Silicon−Gate CMOS The MC74HC125A and MC74HC126A are identical in pinout to the LS125 and LS126. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC125A and HC126A noninverting buffers are designed to be used with 3−state memory address drivers, clock drivers, and other bus−oriented systems. The devices have four separate output enables that are active−low (HC125A) or active−high (HC126A). Features • Output Drive Capability: 15 LSTTL Loads • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 2.0 to 6.0 V • Low Input Current: 1.
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