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NSBMC096-25 - Burst Memory Controller

This page provides the datasheet information for the NSBMC096-25, a member of the NSBMC096-16 Burst Memory Controller family.

Datasheet Summary

Description

The NSBMC096 Burst Memory Controller is an integrated circuit which implements all aspects of DRAM control for high performance systems using an i960 CA CF SuperScalar Embedded Processor The NSBMC096 is functionally equivalent to the V96BMCTM The extremely high instruction rate achieved by these pro

Features

  • Y Interfaces directly to the i960 CA Y Integrated Page Cache Management Y Manages Page Mode Dynamic Memory devices Y On-chip Memory Address Multiplexer Drivers Y Supports DRAMs trom 256 kB to 64 MB Y Bit counter timer Y Non-interleaved or two way interleaved operation Y 5-Bit Bus Watch Timer Y Software-configured operational parameters Y High-Speed Low Power CMOS technology TL V 11805.
  • 1 This document contains information concerning a product that has been developed by National Semicon.

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NSBMC096-16 -25 -33 Burst Memory Controller August 1993 NSBMC096-16 -25 -33 Burst Memory Controller General Description The NSBMC096 Burst Memory Controller is an integrated circuit which implements all aspects of DRAM control for high performance systems using an i960 CA CF SuperScalar Embedded Processor The NSBMC096 is functionally equivalent to the V96BMCTM The extremely high instruction rate achieved by these processors place extraordinary demands on memory system design if maximum throughput is to be sustained and costs minimized Static RAM offers a simple solution for high speed memory systems However high cost and low density make this an expensive and space consumptive choice Dynamic RAMs are an attractive alternative with higher density and low cost Their drawbacks are slower a
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