DS99R105 - (DS99R105 / DS99R106) 3-40MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer

Product Overview

National Semiconductor

Datasheet Details

Part number	DS99R105
Manufacturer	National Semiconductor
File Size	959.92 KB
Description	(DS99R105 / DS99R106) 3-40MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer
Datasheet	DS99R105 Datasheet
Additional preview pages of the DS99R105 datasheet.

Product details

Description

The DS99R105/DS99R106 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream with embedded clock information.

Features

es.
3 MHz.
40 MHz clock embedded and DC-Balancing 24:1 and 1:24 data transmissions.
Capable to drive shielded twisted-pair cable.
User selectable clock edge for parallel data on both Transmitter and Receiver coupling interface with no external coding required Individual power-down controls for both Transmitter and Receiver Embedded clock CDR (clock and data recovery) on Receiver and no external source of reference clock needed All codes RDL (random data lock) to support l.

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Other Datasheets by National Semiconductor

DS99R101 - (DS99R101 / DS99R102) 3-40MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer
DS99R102 - (DS99R101 / DS99R102) 3-40MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer
DS99R103 - (DS99R103 / DS99R104) DC-Balanced 24-Bit LVDS Serializer and Deserializer
DS99R104 - (DS99R103 / DS99R104) DC-Balanced 24-Bit LVDS Serializer and Deserializer
DS99R106 - (DS99R105 / DS99R106) 3-40MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer
DS99R124Q - 5 - 43 MHz 18-bit Color FPD-Link II to FPD-Link Converter

Published: Jun 18, 2010 |