The DM7836/DM8836 are quad 2-lnput receivers designed for use In bus organized data transmission systems interconnected by terminated 120Q impedance lines_ The external termination IS intended to be 180Q reSIStor from the bus to the +5V logic supply together with a 390Q resistor from the bus to grou
Key Features
Plug-i n replacement for SP380 gate.
Low I n put current with normal Vee or
Vee = OV (15 pA typ).
Full PDF Text Transcription for DM8836 (Reference)
Note: Below is a high-fidelity text extraction (approx. 800 characters) for
DM8836. For precise diagrams, and layout, please refer to the original PDF.
Line Drivers/Receivers DM7836/DM8836 quad NOR unified bus receiver general description The DM7836/DM8836 are quad 2-lnput receivers designed for use In bus organized data...
View more extracted text
8836 are quad 2-lnput receivers designed for use In bus organized data transmission systems interconnected by terminated 120Q impedance lines_ The external termination IS intended to be 180Q reSIStor from the bus to the +5V logic supply together with a 390Q resistor from the bus to ground_ The design employs a built-in input hysteresIs providing substantial noise Immunity. Low Input current allows up to 27 drlver/ receiver pairs to utilize a common bus. This receiver has been specifically configured to replace the SP380 gate pln-for-pln to provide the distinct advantages of the DM7837 receiver design in eXistIng systems.
More Datasheets from National Semiconductor (now Texas Instruments)