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COP87L84CL - 8-Bit One-Time Programmable OTP Microcontroller

Download the COP87L84CL datasheet PDF. This datasheet also covers the COP87L84CLM-XE variant, as both devices belong to the same 8-bit one-time programmable otp microcontroller family and are provided as variant models within a single manufacturer datasheet.

Description

The COP87L88CL COP87L84CL OTP microcontrollers are members of the COP8TM feature family using an 8-bit core architecture It is pin and software compatible to the mask ROM COP888CL COP884CL product family (Continued) Y Packages 44 PLCC with 39 I O pins 40 DIP with 33 I O pins 28 DIP with 24 I O pins

Features

  • Y CPU Instruction Set Features Y Y Y Y Two 16-bit timers each with two 16-bit registers supporting Processor independent PWM mode External event counter mode Input capture mode 4 kbytes on-board EPROM with security feature 128 bytes on-board RAM Additional Peripheral Features Y Y Y Y Y Y Y Idle timer Multi-Input Wake-Up (MIWU) with optional interrupts (8).

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (COP87L84CLM-XE_NationalSemiconductor.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by National Semiconductor (Texas Instruments)

Part Number Description
COP87L84 8-Bit CMOS OTP Microcontrollers with 16k Memory/ Comparators/ and CAN Interface
COP87L84BC 8-Bit CMOS OTP Microcontrollers with 16k Memory/ Comparators/ and CAN Interface
COP87L84FH 8-Bit CMOS OTP Microcontrollers with 16k Memory/
COP87L84RK 8-Bit CMOS OTP Microcontrollers with 8k or 32k Memory/ Comparator/ and Single-slope A/D Capability
COP87L88 8-Bit CMOS OTP Microcontrollers with 16k or 32k Memory/ CAN Interface/ 8-Bit A/D/ and USART

Full PDF Text Transcription

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COP87L88CL COP87L84CL 8-Bit One-Time Programmable (OTP) Microcontroller PRELIMINARY September 1996 COP87L88CL COP87L84CL 8-Bit One-Time Programmable (OTP) Microcontroller General Description The COP87L88CL COP87L84CL OTP microcontrollers are members of the COP8TM feature family using an 8-bit core architecture It is pin and software compatible to the mask ROM COP888CL COP884CL product family (Continued) Y Packages 44 PLCC with 39 I O pins 40 DIP with 33 I O pins 28 DIP with 24 I O pins 28 SO with 24 I O pins (contact local sales office for availability) Key Features Y CPU Instruction Set Features Y Y Y Y Two 16-bit timers each with two 16-bit registers supporting Processor independent PWM mode External event counter mode Input capture mode 4 kbytes on-board EPROM with security featu
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