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CLC5903 - Dual Digital Tuner / AGC

Description

The CLC5903 block diagram is shown in Figure 2.

The CLC5903 contains two identical digital down-conversion (DDC) circuits.

Features

  • 78MSPS Operation Low Power, 145mW/channel, 52 MHz, Dec=192 Two Independent Channels with 14-bit inputs Serial Daisy-chain Mode for quad receivers Greater than 100 dB image rejection Greater than 100 dB spurious free dynamic range 0.02 Hz tuning resolution User Programmable AGC with enhanced Power Detector Channel Filt.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CLC5903 Dual Digital Tuner / AGC June 2004 N 0 0 Na t i on a l S e m i c o n du c t o r CLC5903 Dual Digital Tuner / AGC General Overview The CLC5903 Dual Digital Tuner / AGC IC is a two channel digital downconverter (DDC) with integrated automatic gain control (AGC). The CLC5903 is a key component in the Enhanced Diversity Receiver Chipset (EDRCS) which includes one CLC5903 Dual Digital Tuner / AGC, two CLC5957 12-bit analog-to-digital converters (ADCs), and two CLC5526 digitally controlled variable gain amplifiers (DVGAs). This system allows direct IF sampling of signals up to 300MHz for enhanced receiver performance and reduced system costs. The CLC5903 is an enhanced replacement for the CLC5902 in the Diversity Receiver Chipset (DRCS).
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