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CD4723BM - Dual 4-Bit/ 8-Bit Addressable Latch

Datasheet Summary

Description

The CD4723B is a dual 4-bit addressable latch with common control inputs including two address inputs (A0 A1) an active low enable input (E) and an active high clear input (CL) Each latch has a data input (D) and four outputs (Q0 Q3) The CD4724B is an 8-bit addressable latch with three add

Features

  • Y Y Y Y Y Y Y Y Wide supply voltage range 3 0V to 15V High noise immunity 0 45 VDD (typ ) Low power TTL fan out of 2 driving 74L compatibility or 1 driving 74LS Serial to parallel capability Storage register capability Random (addressable) data entry Active high demultiplexing capability Common active high clear Connection Diagrams CD4723B Dual-In-Line Package CD4724B Dual-In-Line Package Order Number CD4723B or CD4724B TL F 6003.
  • 1 TL F 6003.
  • 2 Top View Top View Truth T.

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Datasheet Details

Part number CD4723BM
Manufacturer National Semiconductor
File Size 146.85 KB
Description Dual 4-Bit/ 8-Bit Addressable Latch
Datasheet download datasheet CD4723BM Datasheet
Additional preview pages of the CD4723BM datasheet.

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Full PDF Text Transcription

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CD4723BM CD4723BC Dual 4-Bit Addressable Latch CD4724BM CD4724BC 8-Bit Addressable Latch February 1988 CD4723BM CD4723BC Dual 4-Bit Addressable Latch CD4724BM CD4724BC 8-Bit Addressable Latch General Description The CD4723B is a dual 4-bit addressable latch with common control inputs including two address inputs (A0 A1) an active low enable input (E) and an active high clear input (CL) Each latch has a data input (D) and four outputs (Q0 – Q3) The CD4724B is an 8-bit addressable latch with three address inputs (A0–A2) an active low enable input (E) active high clear input (CL) a data input (D) and eight outputs (Q0 – Q7) Data is entered into a particular bit in the latch when that is addressed by the address inputs and the enable (E) is low Data entry is inhibited when enable (E) is high
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