CD4012C
Description
These NOR and NAND gates are monolithic plementary MOS (CMOS) integrated circuits The N- and P-channel enhancement mode transistors provide a symmetrical circuit with output swings essentially equal to the supply voltage This results in high noise immunity over a wide supply voltage range No DC power other than that caused by leakage current is consumed during static conditions All inputs are protected against static discharge and latching conditions
Features
Wide supply voltage range Low power High noise immunity
3 0V to 15V 10 n W (typ ) 0 45 VDD (typ )
Applications
Automotive Data terminals Instrumentation Medical Electronics
Alarm system Industrial controls Remote metering puters
Connection Diagrams
CD4002 Dual-In-Line Package CD4012 Dual-In-Line Package
TL F 5940
- 1
TL F 5940
- 2
Top View Order Number CD4002 or CD4012
Top View
C1995 National Semiconductor Corporation
TL F 5940
RRD-B30M105 Printed in U S A
Absolute Maximum Ratings...
