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74ACTQ377 - Quiet Series Octal D Flip-Flop

Description

The ’ACQ ’ACTQ377 has 8 edge-triggered D-type flip-flops with individual D inputs and Q outputs The common buffered Clock (CP) input loads all flip-flops simultaneously when the Clock Enable (CE) is low The register is fully edge-triggered The state of each D input one set-up time before the LOW-to-

Features

  • GTOTM output control and undershoot corrector in addition to a split ground bus for superior performance Features Y ICC reduced by 50% Y Guarante.

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74ACQ377  54ACTQ 74ACTQ377 Quiet Series Octal D Flip-Flop with Clock Enable March 1993 74ACQ377  54ACTQ 74ACTQ377 Quiet Series Octal D Flip-Flop with Clock Enable General Description The ’ACQ ’ACTQ377 has 8 edge-triggered D-type flip-flops with individual D inputs and Q outputs The common buffered Clock (CP) input loads all flip-flops simultaneously when the Clock Enable (CE) is low The register is fully edge-triggered The state of each D input one set-up time before the LOW-to-HIGH clock transition is transferred to the corresponding flip-flop’s Q output The CE input must be stable only one set-up time prior to the LOW-to-HIGH clock transition for predictable operation The ’ACQ ’ACTQ utilizes NSC Quiet Series technology to guarantee quiet output switching and improved dynamic thresho
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