VES1993
FEATURES
- DSS and DVB-S patible single chip demodulator & forward error correction.
- Dual 6-bit ADC on chip.
- PLL for crystal frequency multiplication.
- Variable rate BPSK/QPSK coherent demodulator.
- Modulation rate from 1 to 45MBaud.
- Automatic Gain Control output.
- Digital symbol timing recovery : Acquisition range up to ±240ppm
- Digital carrier recovery : Acquisition range up to ±12% of symbol rate
- Half Nyquist baseband filters on chip roll-off = 0.35 for DVB and 0.2 for DSS
- Channel quality estimation.
- Viterbi decoder : Supported rates : from 1/2 to 8/9. Constraint length K = 7 with G1 = 1718 G2 = 1338 VBER measurement provided.
- Convolutional deinterleaver and Reed Solomon decoder according to DVB and DSS specifications.
- Automatic Frame Synchronization.
- Selectable DVB-S descrambling.
- I2C bus interface.
- 100-pin MQFP package.
- CMOS technology (0.35 µm 3.3V).
APPLICATIONS
- DSS receivers.
- DVB-S receivers (ETS 300-421).
- Direct Broadcast Satellite...
