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PCA9518 - Expandable 5-channel I2C hub

General Description

The PCA9518 is a BiCMOS integrated circuit intended for application in I2C-bus and SMBus systems.

Key Features

  • of the I2C-bus system, it permits extension of the I2C-bus by buffering both the data (SDA) and the clock (SCL) lines, thus enabling virtually an unlimited number of buses of 400 pF. The I2C-bus capacitance limit of 400 pF restricts the number of devices and bus length. Using the PCA9518 enables the system designer to divide the bus into an unlimited number of segments off of a hub where any segment to segment transition sees only one repeater delay and is multiple master capable on each segment.

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📁 Similar Datasheet

Part Number Description Manufacturer
PCA9518 Expandable Five-Channel I2C HUB Texas Instruments
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Other Datasheets by NXP Semiconductors

Part Number Description
PCA9510 Hot swappable I2C and SMBus bus buffer
PCA9511 Hot swappable I2C and SMBus bus buffer
PCA9512 Level shifting hot swappable I2C and SMBus buffer
PCA9512A Level shifting hot swappable I2C-bus and SMBus bus buffer
PCA9512B Level shifting hot swappable I2C-bus and SMBus bus buffer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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PCA9518 Expandable 5-channel I2C-bus hub Rev. 05 — 2 December 2008 Product data sheet 1. General description The PCA9518 is a BiCMOS integrated circuit intended for application in I2C-bus and SMBus systems. While retaining all the operating modes and features of the I2C-bus system, it permits extension of the I2C-bus by buffering both the data (SDA) and the clock (SCL) lines, thus enabling virtually an unlimited number of buses of 400 pF. The I2C-bus capacitance limit of 400 pF restricts the number of devices and bus length. Using the PCA9518 enables the system designer to divide the bus into an unlimited number of segments off of a hub where any segment to segment transition sees only one repeater delay and is multiple master capable on each segment.