Download the MIMX9351AVXMAB datasheet PDF.
This datasheet also covers the MIMX9352AVTXMAB variant, as both devices belong to the same i.mx 93 application processors family and are provided as variant models within a single manufacturer datasheet.
Key Features
(Sheet 1 of 3)
Features
Two Cortex®-A55 processors operating up to 1.7 GHz.
32 KB L1 Instruction Cache.
32 KB L1 Data Cache.
64 KB per-core L2 cache.
Media Processing Engine (MPE) with Arm® NeonTM technology supporting the
Advanced Single Instruction Multiple Data architecture.
Floating Point Unit (FPU) with support of the Arm® VFPv4-D16 architecture
Support of 64-bit Arm® v8.2-A architecture
256 KB cluster L3 cache
Parity/ECC protection on L1 cache,.
Full PDF Text Transcription for MIMX9351AVXMAB (Reference)
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MIMX9351AVXMAB. For precise diagrams, and layout, please refer to the original PDF.
NXP Semiconductors Data Sheet: Technical Data Document Number: IMX93AEC Rev. 3, 12/2023 MIMX9352AVTXMAB MIMX9332AVTXMAB MIMX9351AVXMAB MIMX9331AVTXMAB i.MX 93 Application...
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MAB MIMX9332AVTXMAB MIMX9351AVXMAB MIMX9331AVTXMAB i.MX 93 Application Processors Data Sheet for Automotive Products Package Information Plastic Package FCBGA 14 x 14 mm, 0.65 mm pitch Ordering Information 1 i.MX 93 introduction See Table 2 on page 5 The i.MX 93 family represents NXP’s latest 1. i.MX 93 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 power-optimized processors for smart home, building control, contactless HMI, IoT edge, Automotive, and Industrial applications. 1.1. Ordering information . . . . . . . . . . . . . . . . . . . . . . . 4 2. Block diagram . . . . . . . . . . . . . . . .
MIMX9351AVXMAB Datasheet
