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BUK573-48C - PowerMOS transistor Clamped logic level FET

Description

Protected N-channel enhancement mode logic level field-effect power transistor in a plastic full-pack envelope.

The device is intended for use in automotive applications.

It has built-in zener diodes providing active drain voltage clamping.

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Philips Semiconductors Product specification PowerMOS transistor Clamped logic level FET GENERAL DESCRIPTION Protected N-channel enhancement mode logic level field-effect power transistor in a plastic full-pack envelope. The device is intended for use in automotive applications. It has built-in zener diodes providing active drain voltage clamping. BUK573-48C QUICK REFERENCE DATA SYMBOL V(CL)DSR ID Ptot WDSRR RDS(ON) PARAMETER Drain-source clamp voltage Drain current (DC) Total power dissipation Repetitive clamped turn off energy; Tj = 150˚C Drain-source on-state resistance; VGS = 5 V MIN. 40 TYP. MAX.
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