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74LVT10 - 3.3V Triple 3-input NAND gate

General Description

PIN NUMBER 1, 2, 3, 4, 5, 9, 10, 11, 13 6, 8, 12 7 14 A2 SYMBOL An, Bn, Cn Yn GND VCC NAME AND FUNCTION Data inputs Data outputs Ground (0V) Positive supply voltage VCC = Pin 14 GND = Pin 7 B2 C2 SA00348 FUNCTION TABLE INPUTS Dna L L Dnb L L H H L L H Dnc L H L H L H L H OUTPUTS Qn H H H H H H

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INTEGRATED CIRCUITS 74LVT10 3.3V Triple 3-input NAND gate Product specification IC24 Data Handbook 1996 May 29 Philips Semiconductors Philips Semiconductors Product specification 3.3V Triple 3-input NAND gate 74LVT10 QUICK REFERENCE DATA SYMBOL PARAMETER Propagation delay An, Bn, Cn to Yn Input capacitance Total supply current CONDITIONS Tamb = 25°C; GND = 0V CL = 50pF; VCC = 3.3V TYPICAL UNIT LOGIC SYMBOL (IEEE/IEC) 1 2 & 12 tPLH tPHL 3.8 3.3 13 ns 3 4 6 CIN ICCL VI = 0V or 3.0V Outputs Low; VCC = 3.