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74LVC2G86-Q100 - Dual 2-input EXCLUSIVE-OR gate

Description

The 74LVC2G86-Q100 provides a dual 2-input EXCLUSIVE-OR gate.

Inputs can be driven from either 3.3 V or 5 V devices.

This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.

Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1).
  • Specified from 40 C to +85 C and from 40 C to +125 C.
  • Wide supply voltage range from 1.65 V to 5.5 V.
  • 5 V tolerant inputs for interfacing with 5 V logic.
  • High noise immunity.
  • Complies with JEDEC standard:.
  • JESD8-7 (1.65 V to 1.95 V).
  • JESD8-5 (2.3 V to 2.7 V).
  • JESD8B/JESD36 (2.7 V to 3.6 V).
  • ESD protection:.
  • MIL-STD-883, method 3015 exceeds 2000 V.
  • HBM JESD22-.

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Full PDF Text Transcription

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74LVC2G86-Q100 Dual 2-input EXCLUSIVE-OR gate Rev. 1 — 7 May 2013 Product data sheet 1. General description The 74LVC2G86-Q100 provides a dual 2-input EXCLUSIVE-OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2.
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