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74ALS273 - Octal D-type flip-flop

Description

The 74ALS273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs.

The common buffered clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously.

The register is fully edge-triggered.

Features

  • Eight edge-triggered D-type flip-flops.
  • Buffered common clock.
  • Buffered asynchronous master reset.
  • See 74ALS377 for clock enable version.
  • See 74ALS373 for transparent latch version.
  • See 74ALS374 for 3-State version.

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Full PDF Text Transcription

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INTEGRATED CIRCUITS 74ALS273 Octal D–type flip–flop Product specification IC05 Data Handbook 1991 Feb 08 Philips Semiconductors Philips Semiconductors Product specification Octal D-type flip-flop 74ALS273 FEATURES • Eight edge-triggered D-type flip-flops • Buffered common clock • Buffered asynchronous master reset • See 74ALS377 for clock enable version • See 74ALS373 for transparent latch version • See 74ALS374 for 3-State version DESCRIPTION The 74ALS273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The register is fully edge-triggered.
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