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XPC862 - XPC862

Features

  • Part III, “Maximum Tolerated Ratings” Part IV, “Thermal Characteristics” Part V, “Power Dissipation” Part VI, “DC Characteristics” Part VII, “Thermal Calculation and Measurement” Part VIII, “Layout Practices” Part IX, “Bus Signal Timing” Part X, “IEEE 1149.1 Electrical Specifications” Part XI, “CPM Electrical Characteristics” Part XII, “UTOPIA AC Electrical Specifications” Part XIII, “FEC Electrical Characteristics” Part XIV, “Mechanical Data and Ordering Information” Part XV, “Document Revision.

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Hardware Specification MPC862 EC/D Rev. 0.3, 04/2002 MPC862 Family Hardware Specifications This document contains detailed information on power considerations, DC/AC electrical characteristics, and AC timing specifications for the MPC862 family (refer to Table 1 for a list of devices). The MPC862P is the superset device of the MPC862 family. This document contains the following topics: Topic Page Part I Overview m o .c u 4 The CPU on the MPC862 is a 32-bit MPC8xx core that incorporates memory management t units and instruction and data caches. The communications processor module (CPM) e from (MMUs) e the MC68360 QUICC has been enhanced by the addition of the inter-integrated h controller (I C) channel. The memory controller has been enhanced, enabling the MPC862 to s a t a d .
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