SN74LS377
features the mon Enable rather then mon Master Reset.
- 8-Bit High Speed Parallel Registers
- Positive Edge-Triggered D-Type Flip Flops
- Fully Buffered mon Clock and Enable Inputs
- True and plement Outputs
- Input Clamp Diodes Limit High Speed Termination Effects
PIN NAMES
LOADING (Note a)
HIGH
E Enable (Active LOW) Input
0.5 U.L.
0.25 U.L.
D0
- D3 CP
Data Inputs Clock...
