74LS393
DESCRIPTION
Each half of the SN54 / 74LS393 operates in the Modulo 16 binary sequence, as indicated in the ÷ 16 Truth Table. The first flip-flop is triggered by HIGH-to-LOW transitions of the CP input signal. Each of the other flip-flops is triggered by a HIGH-to-LOW transition of the Q output of the preceding flip-flop. Thus state changes of the Q outputs do not occur simultaneously. This means that logic signals derived from binations of these outputs will be subject to decoding spikes and, therefore, should not be used as clocks for other counters, registers or flip-flops. A HIGH signal on MR forces all outputs to the LOW state and prevents counting. Each half of the LS390 contains a ÷ 5 section that is independent except for the mon MR function. The ÷ 5 section operates in 4.2.1 binary sequence, as shown in the ÷ 5 Truth Table, with the third stage output exhibiting a 20% duty cycle when the input frequency is constant. To obtain a ÷10 function having a 50% duty cycle output,...
