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V62C318256 - 2.7 VOLT 32K X 8 STATIC RAM

General Description

The V62C318256 is a 262,144-bit static random access memory organized as 32,768 words by 8 bits.

It is built with MOSEL VITELIC’s high performance CMOS process.

Inputs and threestate outputs are TTL compatible and allow for direct interfacing with common system bus structures.

Key Features

  • I High-speed: 35, 70 ns I Ultra low DC operating current of 2mA (max. ) I Low Power Dissipation:.
  • TTL Standby: 0.5 mA (Max. ).
  • CMOS Standby: 10 µA (Max. ) I Fully static operation I All inputs and outputs directly compatible I Three state outputs I Ultra low data retention current (VCC = 2V) I Extended operating voltage: 2.7V.
  • 3.6V I Packages.
  • 28-pin TSOP (Standard).
  • 28-pin 300 mil SOP (450 mil pin-to-pin).

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Datasheet Details

Part number V62C318256
Manufacturer Mosel Vitelic Corp
File Size 78.03 KB
Description 2.7 VOLT 32K X 8 STATIC RAM
Datasheet download datasheet V62C318256 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MOSEL VITELIC V62C318256 2.7 VOLT 32K X 8 STATIC RAM PRELIMINARY Features I High-speed: 35, 70 ns I Ultra low DC operating current of 2mA (max.) I Low Power Dissipation: – TTL Standby: 0.5 mA (Max.) – CMOS Standby: 10 µA (Max.) I Fully static operation I All inputs and outputs directly compatible I Three state outputs I Ultra low data retention current (VCC = 2V) I Extended operating voltage: 2.7V–3.6V I Packages – 28-pin TSOP (Standard) – 28-pin 300 mil SOP (450 mil pin-to-pin) Description The V62C318256 is a 262,144-bit static random access memory organized as 32,768 words by 8 bits. It is built with MOSEL VITELIC’s high performance CMOS process. Inputs and threestate outputs are TTL compatible and allow for direct interfacing with common system bus structures.