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PIC18F25Q10 - High-Performance Microcontrollers

This page provides the datasheet information for the PIC18F25Q10, a member of the PIC18F24Q10 High-Performance Microcontrollers family.

Datasheet Summary

Description

PIC18F24/25Q10 microcontrollers feature Analog, Core Independent, and Communication Peripherals for a wide range of general purpose and low-power applications.

Features

  • C Compiler Optimized RISC Architecture.
  • Operating Speed:.
  • DC.
  • 64 MHz clock input over the full VDD range.
  • 62.5 ns minimum instruction cycle.
  • Programmable 2-Level Interrupt Priority.
  • 31-Level Deep Hardware Stack.
  • Three 8-Bit Timers (TMR2/4/6) with Hardware Limit Timer (HLT).
  • Four 16-Bit Timers (TMR0/1/3/5).
  • Low-Current Power-on Reset (POR).
  • Power-up Timer (PWRT).
  • Brown-out Reset (BOR).

📥 Download Datasheet

Datasheet preview – PIC18F25Q10

Datasheet Details

Part number PIC18F25Q10
Manufacturer Microchip
File Size 6.27 MB
Description High-Performance Microcontrollers
Datasheet download datasheet PIC18F25Q10 Datasheet
Additional preview pages of the PIC18F25Q10 datasheet.

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Full PDF Text Transcription

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PIC18F24/25Q10 28-Pin, Low-Power, High-Performance Microcontrollers Description PIC18F24/25Q10 microcontrollers feature Analog, Core Independent, and Communication Peripherals for a wide range of general purpose and low-power applications. These 28 -pin devices are equipped with a 10-bit ADC with Computation (ADC2) automating Capacitive Voltage Divider (CVD) techniques for advanced touch sensing, averaging, filtering, oversampling and performing automatic threshold comparisons. They also offer a set of Core Independent Peripherals such as Complementary Waveform Generator (CWG), Windowed Watchdog Timer (WWDT), Cyclic Redundancy Check (CRC)/Memory Scan, Zero-Cross Detect (ZCD), and Peripheral Pin Select (PPS), providing for increased design flexibility and lower system cost.
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