Datasheet4U Logo Datasheet4U.com

SY56017R - Low Voltage 1.2V/1.8V/2.5V CML 2:1 MUX

Datasheet Summary

Description

The SY56017R is a fully differential, low voltage 1.2V/1.8V/2.5V CML 2:1 MUX with input equalization.

The SY56017R can process clock signals as fast as 4.5 GHz or data patterns up to 6.4Gbps.

📥 Download Datasheet

Datasheet preview – SY56017R

Datasheet Details

Part number SY56017R
Manufacturer Micrel
File Size 463.19 KB
Description Low Voltage 1.2V/1.8V/2.5V CML 2:1 MUX
Datasheet download datasheet SY56017R Datasheet
Additional preview pages of the SY56017R datasheet.

📁 Similar Datasheet

  • SY56017R - Low Voltage 1.2V/1.8V/2.5V CML 2:1 MUX (Microchip)
  • SY56011R - Low Voltage 1.2V/1.8V/2.5V CML 1:2 Fanout Buffer (Microchip)
  • SY5000 - Rubber Seal 5 Port Solenoid Valve (SMC)
  • SY5002C - Flyback Controller (Silergy)
  • SY50103 - Flyback Regulator (Silergy)
  • SY50131 - Flyback Regulator (Silergy)
  • SY50133 - Flyback Regulator (Silergy)
  • SY50133Z1 - Flyback Regulator (Silergy)
  • SY5018B - Single Stage Flyback and PFC Controller (Silergy)
  • SY50281 - Buck Regulator (Silergy)
Other Datasheets by Micrel
  • SY56011R - Low Voltage 1.2V/1.8V/2.5V CML 1:2 Fanout Buffer
  • SY56016R - Low Voltage 1.2V/1.8V/2.5V CML Differential Line Driver/Receiver
  • SY56020R - Low Voltage 1.2V/1.8V/2.5V CML 1:4 Fanout Buffer
  • SY56023R - Low Voltage 1.2V/1.8V/2.5V CML 2x2 Crosspoint Switch
  • SY56028XR - Low Voltage 1.2V/1.8V/2.5V CML 4:1 MUX
  • SY56034AR - Low Voltage 1.2V/1.8V/2.5V CML 2:6 MUX
  • SY56216R - CML Dual-Channel Buffer
  • SY56572XR - Low Voltage 1.2V/1.8V/2.5V CML 4:1 MUX

Full PDF Text Transcription

Click to expand full text
SY56017R Low Voltage 1.2V/1.8V/2.5V CML 2:1 MUX 6.4Gbps with Equalization Preliminary General Description The SY56017R is a fully differential, low voltage 1.2V/1.8V/2.5V CML 2:1 MUX with input equalization. The SY56017R can process clock signals as fast as 4.5 GHz or data patterns up to 6.4Gbps. The differential input includes Micrel’s unique, 3-pin input termination architecture that interfaces to CML differential signals, without any level-shifting or termination resistor networks in the signal path. The differential input can also accept AC-coupled LVPECL and LVDS signals. Input voltages as small as 200mV (400mVpp) are applied before the 9”, 18” or 27” FR4 transmission line. For ACcoupled input interface applications, an internal voltage reference is provided to bias the VT pin.
Published: |