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SY100S341 - 8-BIT Shift Register

General Description

s Max.

shift frequency of 600MHz s Max.

Clock to Q delay of 1200ps s IEE min.

150mA s Industry standard 100K ECL levels s Extended supply voltage option: VEE = 4.2V to 5.5V s Voltage and temperature compensation for improved noise immunity s Internal 75kΩ input pull-do

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Datasheet Details

Part number SY100S341
Manufacturer Micrel Semiconductor
File Size 112.42 KB
Description 8-BIT Shift Register
Datasheet download datasheet SY100S341 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Micrel, Inc. NOT RECOMMENDED FOR NEW DESIGNS 8-BIT SHIFT REGISTER SY100S341 SY100S341 FEATURES DESCRIPTION s Max. shift frequency of 600MHz s Max. Clock to Q delay of 1200ps s IEE min. of –150mA s Industry standard 100K ECL levels s Extended supply voltage option: VEE = –4.2V to –5.5V s Voltage and temperature compensation for improved noise immunity s Internal 75kΩ input pull-down resistors s 70% faster than Fairchild 300K at lower power s Function and pinout compatible with Fairchild F100K s Available in 28-pin PLCC package The SY100S341 offer eight D-type, edge-triggered flipflops with both individual inputs for parallel operation as well as serial inputs for bidirectional shifting, and are designed for use in high-performance ECL systems.