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ISPCLOCK5600A - Clock Generator

General Description

The ispClock5610A and ispClock5620A are in-system-programmable high-fanout enhanced zero delay clock generators designed for use in high performance communications and computing applications.

Key Features

  • 8MHz to 400MHz Input/Output Operation Low Output to Output Skew (.

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Datasheet Details

Part number ISPCLOCK5600A
Manufacturer Lattice Semiconductor
File Size 1.02 MB
Description Clock Generator
Datasheet download datasheet ISPCLOCK5600A Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
ispClock 5600A Family ™ In-System Programmable, Enhanced Zero-Delay Clock Generator with Universal Fan-Out Buffer June 2008 Data Sheet DS1019 Features ■ ■ ■ ■ 8MHz to 400MHz Input/Output Operation Low Output to Output Skew (<50ps) Low Jitter Peak-to-Peak Up to 20 Programmable Fan-out Buffers • Programmable output standards and individual enable controls - LVTTL, LVCMOS, HSTL, eHSTL, SSTL, LVDS, LVPECL, Differential HSTL, SSTL • Programmable output impedance - 40 to 70Ω in 5Ω increments • Programmable slew rate • Up to 10 banks with individual VCCO and GND - 1.5V, 1.8V, 2.5V, 3.