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8840 - In-System Programmable SuperBIG High Density PLD

General Description

The ispLSI 8000 Family of Register-Intensive, SuperBIG In-System Programmable Logic Devices is based on Big Fast Megablocks of 120 registered macrocells and a Global Routing Plane (GRP) structure interconnecting the Big Fast Megablocks.

Key Features

  • SuperBIG HIGH.

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Datasheet Details

Part number 8840
Manufacturer Lattice Semiconductor
File Size 304.76 KB
Description In-System Programmable SuperBIG High Density PLD
Datasheet download datasheet 8840 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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ispLSI 8840 ® In-System Programmable SuperBIG™ High Density PLD Features • SuperBIG HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC — 5V Power Supply — 45,000 PLD Gates/840 Macrocells — Up to 312 I/O Pins Supporting 3.3V/5V I/O — 1152 Registers — High-Speed Global and Big Fast Megablock (BFM) Interconnect — Wide 20-Macrocell Generic Logic Block (GLB) for High Performance — Wide Input Gating (44 Inputs per GLB) for Fast Counters, State Machines, Address Decoders, Etc. — PCB-Efficient Ball Grid Array (BGA) Package Options • HIGH-PERFORMANCE E CMOS TECHNOLOGY — fmax = 110 MHz Maximum Operating Frequency — tpd = 8.5 ns Propagation Delay — TTL Compatible Inputs and 3.