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X9261 - Dual Digitally-Controlled Potentiometers

Description

The X9261 integrates 2 digitally controlled potentiometer (XDCP) on a monolithic CMOS integrated circuit.

The digital controlled potentiometer is implemented using 255 resistive elements in a series array.

Between each element are tap points connected to the wiper terminal through switches.

Features

  • Dual.
  • Two Separate Potentiometers.
  • 256 Resistor Taps/pot.
  • 0.4% Resolution.
  • SPI Serial Interface for Write, Read, and Transfer Operations of the Potentiometer Single Supply Device.
  • Wiper Resistance, 100Ω typical @ VCC = 5V.
  • 4 Nonvolatile Data Registers for Each Potentiometer.
  • Nonvolatile Storage of Multiple Wiper Positions.
  • Power-on Recall Loads Saved Wiper Position on Power-up.
  • Standby Current < 5µA Max.

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Full PDF Text Transcription

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® X9261 Single Supply/Low Power/256-Tap/SPI Bus Data Sheet October 12, 2006 FN8171.4 Dual Digitally-Controlled (XDCP™) Potentiometers FEATURES • Dual–Two Separate Potentiometers • 256 Resistor Taps/pot–0.4% Resolution • SPI Serial Interface for Write, Read, and Transfer Operations of the Potentiometer Single Supply Device • Wiper Resistance, 100Ω typical @ VCC = 5V • 4 Nonvolatile Data Registers for Each Potentiometer • Nonvolatile Storage of Multiple Wiper Positions • Power-on Recall Loads Saved Wiper Position on Power-up. • Standby Current < 5µA Max • 50kΩ, 100kΩ Versions of End to End Resistance • 100 yr. Data Retention • Endurance: 100,000 Data Changes per Bit per Register • 24 Ld SOIC, 24 Ld TSSOP • Low Power CMOS • Power Supply VCC = 5V ±10% www.DataSheet4U.
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