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X5043 - (X5043 / X5045) CPU Supervisor

Description

Chip Select Input Serial Output Serial Input Serial Clock Input Write Protect Input Ground Supply Voltage Reset Output Pin Descriptions Serial Output (SO) SO is a push/pull serial data

Features

  • a Serial Peripheral Interface (SPI) and software protocol allowing operation on a simple four-wire bus. The device utilizes Intersil’s proprietary Direct Write™ cell, providing a minimum endurance of 100,000 cycles and a minimum data retention of 100 years. Features.
  • Low VCC Detection and Reset Assertion - Four standard reset threshold voltages 4.63V, 4.38V, 2.93V, 2.63V - Re-program low VCC reset threshold voltage using special programming sequence. - Reset signal valid to VCC = 1V.

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📁 Similar Datasheet

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X5043 512 x 8 Bit CPU Supervisor Renesas
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Other Datasheets by Intersil (Renesas)

Part Number Description
X5045 (X5043 / X5045) CPU Supervisor
X5001 CPU Supervisor
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Full PDF Text Transcription

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® X5043, X5045 4K, 512 x 8 Bit Data Sheet March 16, 2006 FN8126.2 CPU Supervisor with 4K SPI EEPROM These devices combine four popular functions, Power-on Reset Control, Watchdog Timer, Supply Voltage Supervision, and Block Lock Protect Serial EEPROM Memory in one package. This combination lowers system cost, reduces board space requirements, and increases reliability. Applying power to the device activates the power-on reset circuit which holds RESET/RESET active for a period of time. This allows the power supply and oscillator to stabilize before the processor executes code. The Watchdog Timer provides an independent protection mechanism for microcontrollers.
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