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HS1-81C56RH - Radiation Hardened 256 x 8 CMOS RAM

Description

The HS-81C55/56RH are radiation hardened RAM and I/O chips fabricated using the Intersil radiation hardened SelfAligned Junction Isolated (SAJI) silicon gate technology.

Features

  • Devices QML Qualified in Accordance with MIL-PRF-38535.
  • Detailed Electrical and Screening Requirements are Contained in SMD# 5962-95818 and Intersil’ QM Plan.
  • Radiation Hardened EPI-CMOS - Parametrics Guaranteed 1 x 105 RAD(Si) - Transient Upset > 1 x 108 RAD(Si)/s - Latch-Up Free > 1 x 1012 RAD(Si)/s.
  • Electrically Equivalent to Sandia SA 3001.
  • Pin Compatible with Intel 8155/56.
  • Bus Compatible with HS-80C85RH.
  • Single 5V Power Supply.

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Other Datasheets by Intersil (Renesas)

Part Number Description
HS1-81C55RH Radiation Hardened 256 x 8 CMOS RAM
HS1-80C85RH Radiation Hardened 8-Bit CMOS Microprocessor
HS1-80C86RH Radiation Hardened 16-Bit CMOS Microprocessor
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HS1-80C86RH-Q Radiation Hardened 16-Bit CMOS Microprocessor

Full PDF Text Transcription

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HS-81C55RH, HS-81C56RH March 1996 Radiation Hardened 256 x 8 CMOS RAM Description The HS-81C55/56RH are radiation hardened RAM and I/O chips fabricated using the Intersil radiation hardened SelfAligned Junction Isolated (SAJI) silicon gate technology. Latch-up free operation is achieved by the use of epitaxial starting material to eliminate the parasitic SCR effect seen in conventional bulk CMOS devices. The HS-81C55/56RH is intended for use with the HS-80C85RH radiation hardened microprocessor system. The RAM portion is designed as 2048 static cells organized as 256 x 8. A maximum post irradiation access time of 500ns allows the HS-81C55/56RH to be used with the HS-80C85RH CPU without any wait states.
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