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HM-6551883 - 256 x 4 CMOS RAM

Description

PIN DESCRIPTION A Address Input E Chip Enable W Write Enable S Chip Select D Data Input Q Data Output DATASHEET FN2988 Rev.2.00 July 2003

Features

  • This Circuit is Processed in Accordance to MIL-STD-883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1.
  • Low Power Standby.
  • . 50W Max.
  • Low Power Operation.
  • .20mW/MHz Max.
  • Fast Access Time.
  • . . . 220ns Max.
  • Data Retention.
  • at 2.0V Min.
  • TTL Compatible Input/Output.
  • High Output Drive.

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Full PDF Text Transcription

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HM-6551/883 256 x 4 CMOS RAM The HM-6551/883 is a 256 x 4 static CMOS RAM fabricated using self-aligned silicon gate technology. Synchronous circuit design techniques are employed to achieve high performance and low power operation. On chip latches are provided for address and data outputs allowing efficient interfacing with microprocessor systems. The data output buffers can be forced to a high impedance state for use in expanded memory arrays. The HM-6551/883 is a fully static RAM and may be maintained in any state for an indefinite period of time. Data retention supply voltage and supply current are guaranteed over temperature. Ordering Information TEMP. PACKAGE RANGE 220ns 300ns PKG. DWG. # CERDIP -55°C to HM1-6551B/883 HM1-6551/883 F22.
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