Full PDF Text Transcription for TB28F200BX (Reference)
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2-MBIT (128K x 16 256K x 8) BOOT BLOCK FLASH MEMORY FAMILY 28F200BX-T B 28F002BX-T B Y x8 x16 Input Output Architecture 28F200BX-T 28F200BX-B For High Performance and Hig...
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Output Architecture 28F200BX-T 28F200BX-B For High Performance and High Integration 16-bit and 32-bit CPUs Y x8-only Input Output Architecture 28F002BX-T 28F002BX-B For Space Constrained 8-bit Applications Y Upgradeable to Intel’s SmartVoltage Products Y Optimized High-Density Blocked Architecture One 16-KB Protected Boot Block Two 8-KB Parameter Blocks One 96-KB Main Block One 128 KB Main Block Top or Bottom Boot Locations Y Extended Cycling Capability 100 000 Block Erase Cycles Y Automated Word Byte Write and Block Erase Command User Interface Status Registers Erase Suspend Capability Y SRAM-Compatible Write Interface Y
TB28F200BX Datasheet
