Datasheet4U Logo Datasheet4U.com

28F001BX-T - 1-MBIT (128K x 8) BOOT BLOCK FLASH MEMORY

Description

Symbol A0 A16 DQ0 DQ7 Type INPUT INPUT OUTPUT Name and Function ADDRESS INPUTS for memory addresses Addresses are internally latched during a write cycle DATA INPUTS OUTPUTS Inputs data and commands during memory write cycles outputs data during memory Status Register and Identifie

Features

  • that simplify write and allow block erase These devices aid the system designer by combining the functions of several components into one making boot block flash an innovative alternative to EPROM and EEPROM or battery-backed static RAM Many new and existing designs can take advantage of the 28F001BX’s integration of blocked architecture automated electrical reprogramming and standard processor interface The 28F001BX-B and 28F001BX-T are 1 048 576 bit nonvolatile memories organized as 131 072 by.

📥 Download Datasheet

Datasheet Details

Part number 28F001BX-T
Manufacturer Intel
File Size 436.25 KB
Description 1-MBIT (128K x 8) BOOT BLOCK FLASH MEMORY
Datasheet download datasheet 28F001BX-T Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
28F010 1 Megabit CMOS Flash Memory Catalyst Semiconductor
28F1000 MX28F1000 Macronix International
28F102 CAT28F102 Catalyst Semiconductor
28F128J3A (28FxxxJ3A) Intel StrataFlash Memory Intel Corporation
28F128L18 (28FxxxL18) StrataFlash Wireless Memory Intel Corporation

Other Datasheets by Intel

Part Number Description
28F001BX-B 1-MBIT (128K x 8) BOOT BLOCK FLASH MEMORY
28F001BN-B 1-MBIT (128K x 8) BOOT BLOCK FLASH MEMORY
28F001BN-T 1-MBIT (128K x 8) BOOT BLOCK FLASH MEMORY
28F002BC 28F002BC 2-MBIT (256K X 8) BOOT BLOCK FLASH MEMORY
28F002BL-B LOW-POWER BOOT BLOCK FLASH MEMORY

Full PDF Text Transcription

Click to expand full text
1-MBIT (128K x 8) BOOT BLOCK FLASH MEMORY 28F001BX-T 28F001BX-B 28F001BN-T 28F001BN-B Y High-Integration Blocked Architecture One 8 KB Boot Block w Lock Out Two 4 KB Parameter Blocks One 112 KB Main Block 100 000 Erase Program Cycles Per Block Simplified Program and Erase Automated Algorithms via On-Chip Write State Machine (WSM) SRAM-Compatible Write Interface Deep Power-Down Mode 0 05 mA ICC Typical 0 8 mA IPP Typical 12 0V g 5% VPP Y High-Performance Read 70 75 ns 90 ns 120 ns 150 ns Maximum Access Time 5 0V g 10% VCC Hardware Data Protection Feature Erase Write Lockout during Power Transitions Advanced Packaging JEDEC Pinouts 32-Pin PDIP 32-Lead PLCC TSOP ETOX TM II Nonvolatile Flash Technology EPROM-Compatible Process Base High-Volume Manufacturing Experience Extended Temperature O
Published: |