8XC196NT - CHMOS MICROCONTROLLER WITH 1 MBYTE LINEAR ADDRESS SPACE
Intel Corporation
General Description
of Intel’s thermal impedance test methodology
272267
2
EXAMPLE N87C196NT is 68-Lead PLCC OTPROM For complete package dimensional data refer to the Intel Packaging Handbook (Order Number 240800)
Figure 2 The 8XC186NT Familiy Nomenclature
2
8XC196NT
8XC196NT Memory Map Address (Note 7)
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8XC196NT CHMOS MICROCONTROLLER WITH 1 MBYTE LINEAR ADDRESS SPACE
Y Y Y Y Y Y Y Y Y Y Y Y
20 MHz Operation High Performance CHMOS 16-Bit CPU Up to 32 Kbytes of On-Chip OTPROM Up to 1 Kbyte of On-Chip Register RAM Up to 512 Bytes of Internal RAM Register-Register Architecture 4 Channel 10-Bit A D with Sample Hold 37 Prioritized Interrupt Sources Up to Seven 8-Bit (56) I O Ports Full Duplex Serial I O Port Dedicated Baud Rate Generator Interprocessor Communication Slave Port Selectable Bus Timing Modes for Flexible External Memory Interfacing
Reg RAM 1K
Y Y
Oscillator Fail Detection Circuitry High Speed Peripheral Transaction Server (PTS) Two Dedicated 16-Bit High-Speed Compare Registers 10 High Speed Capture Compare (EPA) Full Duplex Synchronous Serial I O Port (SSIO) Two Flexible 16-Bit
8XC196NT Datasheet
