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82503 - DUAL SERIAL TRANSCEIVER (DST)

General Description

3 11 Polarity Switching 3 12 Controller Interface PAGE 3 5 6 6 6 7 7 8 9 10 10 10 11 13 13 13 13 14 14 14 14 15 CONTENTS PAGE 16 16 16 16 16 17 17 17 17 19 20 4 0 RESET LOW POWER AND TEST MODES 4 1 Reset 4 2 Low Power and High Impedance Modes 4 3 Diagnostic Loopback 4 4 Customer Test Modes (Conti

Key Features

  • TPE Y AUI Y Y Y Complies with 10BASE-T IEEE Std 802 3i-1990 for Twisted Pair Ethernet Selectable Polarity Switching Direct Interface to TPE Analog Filters On-Chip TPE Squelch Defeatable Link Integrity (LI) Support of Cable Lengths l 100m Complies with IEEE 802 3 AUI Standard Direct Interface to AUI Transformers On-Chip AUI Squelch Y Y Y Y Y A block diagram of a typical.

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Datasheet Details

Part number 82503
Manufacturer Intel Corporation
File Size 562.77 KB
Description DUAL SERIAL TRANSCEIVER (DST)
Datasheet download datasheet 82503 Datasheet

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Full PDF Text Transcription for 82503 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for 82503. For precise diagrams, tables, and layout, please refer to the original PDF.

82503 DUAL SERIAL TRANSCEIVER (DST) 82503 PRODUCT FEATURE SET OVERVIEW Y Single Component Ethernet Interface to Both 802 3 10BASE-T and AUI Automatic or Manual Port Selec...

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nterface to Both 802 3 10BASE-T and AUI Automatic or Manual Port Selection Manchester Encoder Decoder and Clock Recovery No Glue Interface to Industry-Standard LAN Controllers Intel 82586 82590 82593 and 82596 AMD 7990 (LANCE ) National Semiconductor 8390 and 83932 (SONIC ) Western Digital 83C690 Fujitsu 86950 (Etherstar ) Y Y Y Y Y Diagnostic Loopback Reset Low Power Modes Network Status Indicators Defeatable Jabber Timer User Test Modes 10 MHz Transmit Clock Generator One Micron CHMOS Technology Single 5-V Supply IV (Px48) Y Y Y Y Y Y INTERFACE FEATURES TPE Y AUI Y Y Y Complies with 10BASE-T IEEE Std 802 3i-1990 for Twis