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IS61LPS51236B/IS61VPS51236B/IS61VVPS51236B IS61LPS102418B/IS61VPS102418B/IS61VVPS102418B
512K x36 and 1024K x18 18Mb SYNCHRONOUS PIPELINED SINGLE CYCLE DESELECT STATIC RAM
AUGUST 2017
FEATURES
• Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and • control • Burst sequence control using MODE input • Three chip enable option for simple depth
expansion and address pipelining • Common data inputs and data outputs • Auto Power-down during deselect • Single cycle deselect • Snooze MODE for reduced-power standby • JEDEC 100-pin QFP, 165-ball BGA and 119-ball
BGA packages • Power supply:
LPS: VDD 3.3V (± 5%), VDDQ 3.3V/2.5V (± 5%) VPS: VDD 2.5V (± 5%), VDDQ 2.5V (± 5%) VVPS: VDD 1.8V (± 5%), VDDQ 1.
IS61VVPS51236B Datasheet
