IS61VF51232 - 512K x 32 Synchronous Flow-through Static RAM

Datasheet Summary

Description

are high-speed, low-power synchronous static RAMs designed to provide burstable, high-performance memory for communication and networking applications.

Features

Internal self-timed write cycle.
Individual Byte Write Control and Global Write.
Clock controlled, registered address, data and control.
Linear burst sequence control using MODE input.
Three chip enable option for simple depth expansion and address pipelining.
Common data inputs and data outputs.
JEDEC 100-Pin TQFP and 119-pin PBGA package.
Single +2.5V, ±5% operation.
Auto Power-down during deselect.
Sing.

Integrated Silicon Solution

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Datasheet Details

Part number	IS61VF51232
Manufacturer	Integrated Silicon Solution
File Size	215.08 KB
Description	512K x 32 Synchronous Flow-through Static RAM
Datasheet	IS61VF51232 Datasheet
Additional preview pages of the IS61VF51232 datasheet.

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Full PDF Text Transcription

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IS61VF51232 IS61VF51236 IS61VF10018 512K x 32, 512K x 36, 1024K x 18 SYNCHRONOUS FLOW-THROUGH STATIC RAM ISSI ® ADVANCE INFORMATION October 2001 FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Linear burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs and data outputs • JEDEC 100-Pin TQFP and 119-pin PBGA package • Single +2.

Published: Oct 1, 2009 |