IS41LV16256B Datasheet PDF - Integrated Silicon Solution 256K x 16 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE Specs

IS41LV16256B - 256K x 16 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE

Datasheet Summary

Description

The ISSI IS41LV16256B is 262,144 x 16-bit high-performance CMOS Dynamic Random Access Memory.

Both products offer accelerated cycle access EDO Page Mode.

EDO Page Mode allows 512 random accesses within a single row with access cycle time as short as 10ns per 16-bit word.

Features

TTL compatible inputs and outputs.
Refresh Interval: 512 cycles/8 ms.
Refresh Mode : RAS-Only, CAS-before-RAS (CBR), and Hidden.
JEDEC standard pinout.
Single power supply: 3.3V ± 10%.
Byte Write and Byte Read operation via two CAS.
Lead-free available www. DataSheet4U. com ISSI APRIL 2005 ®.

Datasheet Details

Part number	IS41LV16256B
Manufacturer	Integrated Silicon Solution
File Size	182.62 KB
Description	256K x 16 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
Datasheet	IS41LV16256B Datasheet
Additional preview pages of the IS41LV16256B datasheet.

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Full PDF Text Transcription

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IS41LV16256B 256K x 16 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE FEATURES • TTL compatible inputs and outputs • Refresh Interval: 512 cycles/8 ms • Refresh Mode : RAS-Only, CAS-before-RAS (CBR), and Hidden • JEDEC standard pinout • Single power supply: 3.3V ± 10% • Byte Write and Byte Read operation via two CAS • Lead-free available www.DataSheet4U.com ISSI APRIL 2005 ® DESCRIPTION The ISSI IS41LV16256B is 262,144 x 16-bit high-performance CMOS Dynamic Random Access Memory. Both products offer accelerated cycle access EDO Page Mode. EDO Page Mode allows 512 random accesses within a single row with access cycle time as short as 10ns per 16-bit word. The Byte Write control, of upper and lower byte, makes the IS41LV16256B ideal for use in 16 and 32-bit wide data bus systems.

Published: Apr 22, 2010 |