IDT82V3002A Datasheet PDF - Integrated Device Technology WAN PLL Specs

IDT82V3002A - WAN PLL

Datasheet Summary

Description

The IDT82V3002A is a WAN PLL with dual reference inputs.

It contains a Digital Phase-Locked Loop (DPLL), which generates ST-BUS clocks and framing signals that are phase locked to a 2.048 MHz, 1.544 MHz or 8 kHz input reference.

Features

Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 3, Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces.
Supports ITU-T G.813 Option 1 clocks for 2048 kbit/s interfaces.
Supports ITU-T G.812 Type IV clocks for 1544 kbit/s interface and 2048 kbit/s interfaces.
Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interface.
Selectable input reference signal: 8 kHz, 1.544 MHz or 2.048 MHz.
Accepts reference inputs fr.

Datasheet Details

Part number	IDT82V3002A
Manufacturer	Integrated Device Technology
File Size	388.63 KB
Description	WAN PLL
Datasheet	IDT82V3002A Datasheet
Additional preview pages of the IDT82V3002A datasheet.

📁 Similar Datasheet

IDT82V3002A - WAN PLL (Renesas)

IDT82V3001A - WAN PLL (Renesas)

IDT82V3011 - T1/E1/OC3 WAN PLL (Integrated Device)

IDT82V3012 - T1/E1/OC3 WAN PLL (Integrated Device)

IDT82V1671 - CHIPSET OF RINGING SUBSCRIBER LINE INTERFACE CIRCUIT (RSLIC) & QUAD PROGRAMMABLE PCM CODEC (Integrated Device)

IDT82V2041E - SINGLE CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE (IDT)

IDT82V2041E - SINGLE CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT (Renesas)

IDT82V2042E - DUAL CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE (IDT)

IDT82V2044 - QUAD T1/E1 SHORT HAUL LINE INTERFACE (IDT)

IDT82V2044E - QUAD CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE (IDT)

Full PDF Text Transcription

Click to expand full text

WAN PLL WITH DUAL REFERENCE INPUTS www.DataSheet4U.com IDT82V3002A FEATURES • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 3, Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces • Supports ITU-T G.813 Option 1 clocks for 2048 kbit/s interfaces • Supports ITU-T G.812 Type IV clocks for 1544 kbit/s interface and 2048 kbit/s interfaces • Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interface • Selectable input reference signal: 8 kHz, 1.544 MHz or 2.048 MHz • Accepts reference inputs from two independent sources • Provides eight types of clock signals: C1.5o, C3o, C2o, C4o, C6o, C8o, C16o and C32o • Provides six types of 8 kHz framing pulses: F0o, F8o, F16o, F32o, RSP and TSP • • • • • • • • • • • • • • Holdover frequency accuracy of 0.

Published: Feb 4, 2009 |