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IDT72T4088 - HIGH-SPEED TeraSync DDR/SDR FIFO

Download the IDT72T4088 datasheet PDF. This datasheet also covers the IDT72T40108 variant, as both devices belong to the same high-speed terasync ddr/sdr fifo family and are provided as variant models within a single manufacturer datasheet.

Description

The IDT72T4088/72T4098/72T40108/72T40118 are exceptionally deep, extremely high speed, CMOS First-In-First-Out (FIFO) memories with the ability to read and write data on both rising and falling edges of clock.

Features

  • Choose among the following memory organizations: IDT72T4088  16,384 x 40 IDT72T4098  32,768 x 40 IDT72T40108  65,536 x 40 IDT72T40118  131,072 x 40 Up to 250MHz Operation of Clocks - 4ns read/write cycle time, 3.2ns access time Users selectable input port to output port data rates, 500Mb/s Data Rate -DDR to DDR -DDR to SDR -SDR to DDR -SDR to SDR User selectable HSTL or LVTTL I/O.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IDT72T40108_IntegratedDeviceTechnology.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number IDT72T4088
Manufacturer Integrated Device Technology
File Size 517.19 KB
Description HIGH-SPEED TeraSync DDR/SDR FIFO
Datasheet download datasheet IDT72T4088 Datasheet

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Other Datasheets by Integrated Device Technology

Part Number Description
IDT72T40108 HIGH-SPEED TeraSync DDR/SDR FIFO
IDT72T40118 HIGH-SPEED TeraSync DDR/SDR FIFO
IDT72T4098 HIGH-SPEED TeraSync DDR/SDR FIFO
IDT72T20108 DDR/SDR FIFO
IDT72T20118 DDR/SDR FIFO

Full PDF Text Transcription

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www.DataSheet4U.com 2.5 VOLT HIGH-SPEED TeraSync™ DDR/SDR FIFO 40-BIT CONFIGURATION 16,384 x 40, 32,768 x 40, 65,536 x 40, 131,072 x 40 IDT72T4088, IDT72T4098 IDT72T40108, IDT72T40118 • • FEATURES • • • • • • • • • • • Choose among the following memory organizations: IDT72T4088  16,384 x 40 IDT72T4098  32,768 x 40 IDT72T40108  65,536 x 40 IDT72T40118  131,072 x 40 Up to 250MHz Operation of Clocks - 4ns read/write cycle time, 3.2ns access time Users selectable input port to output port data rates, 500Mb/s Data Rate -DDR to DDR -DDR to SDR -SDR to DDR -SDR to SDR User selectable HSTL or LVTTL I/Os Read Enable & Read Clock Echo outputs aid high speed operation 2.5V LVTTL or 1.8V, 1.5V HSTL Port Selectable Input/Ouput voltage 3.
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