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32K x 32 CacheRAM™ 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect Features
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IDT71V432
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32K x 32 memory configuration Supports high-performance system speed: Commercial and Industrial: — 5ns Clock-to-Data Access (100MHz) — 6ns Clock-to-Data Access (83MHz) — 7ns Clock-to-Data Access (66MHz) Single-cycle deselect functionality (Compatible with Micron Part # MT58LC32K32D7LG-XX) LBO input selects interleaved or linear burst mode Self-timed write cycle with global write control (GW), byte write enable (BWE), and byte writes (BWx) Power down controlled by ZZ input Operates with a single 3.3V power supply (+10/-5%) Packaged in a JEDEC Standard 100-pin rectangular plastic thin quad flatpack (TQFP).
Description
The IDT71V432 is a 3.