ICS8344 Datasheet PDF (1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER) | Download Integrated Circuit Systems ICS8344

ICS8344 - 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER

Integrated Circuit Systems

Description

The ICS8344 is a low voltage, low skew fanout buffer and a member of the HiPerClockS™ HiPerClockS™ family of High Performance Clock Solutions from ICS.

The ICS8344 is designed to translate any differential signal levels to LVCMOS levels.

Features

24 LVCMOS outputs, 7Ω typical output impedance.
Output frequency up to 167MHz.
275ps output skew, 600ps part to part skew.
Translates any differential input signal (PECL, HSTL, LVDS) to LVCMOS without external bias networks.
Translates any single-ended input signal to LVCMOS with resistor bias on nCLK input.
Translates and inverts any single-ended input signal to LVCMOS with resistor bias on CLK input.
Multiple differential clock in.

Datasheet Details

Part number	ICS8344
Manufacturer	Integrated Circuit Systems
File Size	141.77 KB
Description	1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER
Datasheet	ICS8344 Datasheet

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Part Number

Description

Manufacturer

ICS8344I-01

1-TO-24 DIFFERENTIAL -TO-LVCMOS/LVTTL FANOUT BUFFER

Integrated Device Technology

ICS83023

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ICS83023I

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ICS83026I-01

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Integrated Device Technology

ICS8304

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Other Datasheets by Integrated Circuit Systems

Part Number	Description
ICS8344-01	1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER
ICS8344I	1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER
ICS8343	Low Skew 1-to-16 Fanout Buffer
ICS8343-01	1-TO-16 LVCMOS / LVTTL FANOUT BUFFER
ICS8343I	LOW SKEW 1-TO-16 FANOUT BUFFER

Part Number

Description

ICS8344-01

1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER

ICS8344I

1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER

ICS8343

Low Skew 1-to-16 Fanout Buffer

ICS8343-01

1-TO-16 LVCMOS / LVTTL FANOUT BUFFER

ICS8343I

LOW SKEW 1-TO-16 FANOUT BUFFER

Full PDF Text Transcription

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PRELIMINARY Integrated Circuit Systems, Inc. ICS8344 LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER FEATURES • 24 LVCMOS outputs, 7Ω typical output impedance • Output frequency up to 167MHz • 275ps output skew, 600ps part to part skew • Translates any differential input signal (PECL, HSTL, LVDS) to LVCMOS without external bias networks • Translates any single-ended input signal to LVCMOS with resistor bias on nCLK input • Translates and inverts any single-ended input signal to LVCMOS with resistor bias on CLK input • Multiple differential clock input pairs for redundant clock applications • LVCMOS control inputs • Multiple output enable pins for disabling unused outputs in reduced fanout applications • 3.3V, 2.5V or mixed 3.3V, 2.

Published: Dec 18, 2008 |