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IS42RM81600E - 128Mb Mobile Synchronous DRAM

Download the IS42RM81600E datasheet PDF. This datasheet also covers the IS42SM81600E variant, as both devices belong to the same 128mb mobile synchronous dram family and are provided as variant models within a single manufacturer datasheet.

Description

ISSI's 128Mb Mobile Synchronous DRAM achieves highspeed data transfer using pipeline architecture.

All input and output signals refer to the rising edge of the clock input.

Both write and read accesses to the SDRAM are burst oriented.

Features

  • Fully synchronous; all signals referenced to a positive clock edge.
  • Internal bank for hiding row access and precharge.
  • Programmable CAS latency: 2, 3.
  • Programmable Burst Length: 1, 2, 4, 8, and Full Page.
  • Programmable Burst Sequence:.
  • Sequential and Interleave.
  • Auto Refresh (CBR).
  • TCSR (Temperature Compensated Self Refresh).
  • PASR (Partial Arrays Self Refresh): 1/16, 1/8, 1/4, 1/2, and Full.
  • Deep.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IS42SM81600E_ISSI.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

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Other Datasheets by ISSI (now Infineon)

Part Number Description
IS42RM16160E 4M x 16Bits x 4Banks Mobile Synchronous DRAM
IS42RM16200C 1M x 16Bits x 2Banks Low Power Synchronous DRAM
IS42RM16200D 1M x 16Bits x 2Banks Low Power Synchronous DRAM
IS42RM16400K 1M x 16Bits x 4Banks Mobile Synchronous DRAM
IS42RM16800E 128Mb Mobile Synchronous DRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
IS42SM81600E / IS42SM16800E / IS42SM32400E IS42RM81600E / IS42RM16800E / IS42RM32400E 16Mx8, 8Mx16, 4Mx32 128Mb Mobile Synchronous DRAM FEATURES • Fully synchronous; all signals referenced to a positive clock edge • Internal bank for hiding row access and precharge • Programmable CAS latency: 2, 3 • Programmable Burst Length: 1, 2, 4, 8, and Full Page • Programmable Burst Sequence: • Sequential and Interleave • Auto Refresh (CBR) • TCSR (Temperature Compensated Self Refresh) • PASR (Partial Arrays Self Refresh): 1/16, 1/8, 1/4, 1/2, and Full • Deep Power Down Mode (DPD) • Driver Strength Control (DS): 1/4, 1/2, and Full APRIL 2011 DESCRIPTION ISSI's 128Mb Mobile Synchronous DRAM achieves highspeed data transfer using pipeline architecture.
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