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IW4027B - Dual J-K Flip-Flop

Features

  • independent Set, Reset, and Clock inputs. Data is accepted when the Clock is LOW and transferred to the output on the positive-going edge of the Clock. The active HIGH asynchronous Reset and Set are independent and override the J, K, or Clock inputs. The outputs are buffered for best system performance.
  • Operating Voltage Range: 3.0 to 18 V.
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C.
  • Noise margin (over full packa.

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Datasheet preview – IW4027B

Datasheet Details

Part number IW4027B
Manufacturer IK Semiconductor
File Size 216.32 KB
Description Dual J-K Flip-Flop
Datasheet download datasheet IW4027B Datasheet
Additional preview pages of the IW4027B datasheet.

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Full PDF Text Transcription

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TECHNICAL DATA IW4027B Dual JK Flip-Flop The IW4027B is a Dual JK Flip-Flop which is edge-triggered and features independent Set, Reset, and Clock inputs. Data is accepted when the Clock is LOW and transferred to the output on the positive-going edge of the Clock. The active HIGH asynchronous Reset and Set are independent and override the J, K, or Clock inputs. The outputs are buffered for best system performance. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C • Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.
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