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IDT74FCT162501CT - FAST CMOS 18-BIT REGISTERED TRANSCEIVER

Download the IDT74FCT162501CT datasheet PDF. This datasheet also covers the IDT74FCT162501 variant, as both devices belong to the same fast cmos 18-bit registered transceiver family and are provided as variant models within a single manufacturer datasheet.

Features

  • CMOS technology. These high-speed, low-power 18-bit reg-.
  • Common features: istered bus transceivers combine D-type latches and D-type.
  • 0.5 MICRON CMOS Technology flip-flops to allow data flow in transparent, latched and clocked.
  • High-speed, low-power CMOS replacement for ABT functions modes. Data flow in each direction is controlled by output- enable (OEAB and OEBA), latch enable (LEAB and LEBA).
  • Typical tSK(o) (Output Skew) < 250ps and clock (CLKAB.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IDT74FCT162501_IntegratedDeviceTechnology.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number IDT74FCT162501CT
Manufacturer IDT
File Size 140.43 KB
Description FAST CMOS 18-BIT REGISTERED TRANSCEIVER
Datasheet download datasheet IDT74FCT162501CT Datasheet

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Other Datasheets by IDT

Part Number Description
IDT74FCT162501AT FAST CMOS 18-BIT REGISTERED TRANSCEIVER
IDT74FCT162501ET FAST CMOS 18-BIT REGISTERED TRANSCEIVER
IDT74FCT162500AT FAST CMOS 18-BIT REGISTERED TRANSCEIVER
IDT74FCT162500CT FAST CMOS 18-BIT REGISTERED TRANSCEIVER
IDT74FCT162500ET FAST CMOS 18-BIT REGISTERED TRANSCEIVER

Full PDF Text Transcription

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Integrated Device Technology, Inc. FAST CMOS 18-BIT REGISTERED TRANSCEIVER IDT54/74FCT16501AT/CT/ET IDT54/74FCT162501AT/CT/ET IDT54/74FCT162H501AT/CT/ET FEATURES: CMOS technology. These high-speed, low-power 18-bit reg- • Common features: istered bus transceivers combine D-type latches and D-type – 0.5 MICRON CMOS Technology flip-flops to allow data flow in transparent, latched and clocked – High-speed, low-power CMOS replacement for ABT functions modes. Data flow in each direction is controlled by output- enable (OEAB and OEBA), latch enable (LEAB and LEBA) – Typical tSK(o) (Output Skew) < 250ps and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, – Low input and output leakage ≤ 1µA (max.) the device operates in transparent mode when LEAB is HIGH.
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