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IDT70T3589S - HIGH-SPEED 2.5V 256/128/64K x 36 SYNCHRONOUS DUAL-PORT STATIC RAM

Download the IDT70T3589S datasheet PDF. This datasheet also covers the IDT70T3519 variant, as both devices belong to the same high-speed 2.5v 256/128/64k x 36 synchronous dual-port static ram family and are provided as variant models within a single manufacturer datasheet.

Description

tional or bidirectional data flow in bursts.

An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode.

Features

  • HIGH-SPEED 2.5V 256/128/64K x 36 IDT70T3519/99/89S.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IDT70T3519_IDT.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number IDT70T3589S
Manufacturer IDT
File Size 397.79 KB
Description HIGH-SPEED 2.5V 256/128/64K x 36 SYNCHRONOUS DUAL-PORT STATIC RAM
Datasheet download datasheet IDT70T3589S Datasheet

📁 Similar Datasheet

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Other Datasheets by IDT

Part Number Description
IDT70T3589 HIGH-SPEED 2.5V 256/128/64K x 36 SYNCHRONOUS DUAL-PORT STATIC RAM
IDT70T3509M HIGH-SPEED 2.5V 1024K x 36 SYNCHRONOUS DUAL-PORT STATIC RAM
IDT70T3519 HIGH-SPEED 2.5V 256/128/64K x 36 SYNCHRONOUS DUAL-PORT STATIC RAM
IDT70T3539M HIGH-SPEED 2.5V 512K x 36 SYNCHRONOUS DUAL-PORT STATIC RAM
IDT70T3599 HIGH-SPEED 2.5V 256/128/64K x 36 SYNCHRONOUS DUAL-PORT STATIC RAM

Full PDF Text Transcription

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www.DataSheet4U.com Features: ◆ ◆ HIGH-SPEED 2.5V 256/128/64K x 36 IDT70T3519/99/89S SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE – Data input, address, byte enable and control registers – Self-timed write allows fast cycle time Separate byte controls for multiplexed bus and bus matching compatibility Dual Cycle Deselect (DCD) for Pipelined Output Mode 2.5V (±100mV) power supply for core LVTTL compatible, selectable 3.3V (±150mV) or 2.5V (±100mV) power supply for I/Os and control signals on each port Industrial temperature range (-40°C to +85°C) is available at 166MHz and 133MHz Available in a 256-pin Ball Grid Array (BGA), a 208-pin Plastic Quad Flatpack (PQFP) and 208-pin fine pitch Ball Grid Array (fpBGA) Supports JTAG features compliant with IEEE 1149.
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