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Low Skew, 1-To-4 Differential-To-LVDS Fanout Buffer w/Internal Termination
ICS8S89833I
DATA SHEET
General Description
The ICS8S89833I is a high speed 1-to-4 Differential-to-LVDS Fanout Buffer with Internal Termination. The ICS8S89833I is optimized for high speed and very low output skew, making it suitable for use in demanding applications such as SONET, 1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The internally terminated differential input and VREF_AC pin allow other differential signal families such as LVPECL, LVDS, and CML to be easily interfaced to the input with minimal use of external components. The device also has an output enable pin which may be useful for system test and debug purposes.
ICS8S89833I Datasheet
