Datasheet4U Logo Datasheet4U.com

9DBV0541 - 5 Output 1.8V HCSL Fanout Buffer

Datasheet Summary

Description

The 9DBV0541 is a member of IDT's 1.8V Very-Low-Power (VLP) PCIe family.

It has integrated terminations for direct connection to 100ohm transmission lines.

The device has 5 output enables for clock management, and 3 selectable SMBus addresses.

Features

  • 5.
  • 1-200MHz Low-Power (LP) HCSL DIF pairs w/Zo=100 Key Specifications.
  • DIF additive cycle-to-cycle jitter.

📥 Download Datasheet

Datasheet preview – 9DBV0541

Datasheet Details

Part number 9DBV0541
Manufacturer IDT
File Size 209.71 KB
Description 5 Output 1.8V HCSL Fanout Buffer
Datasheet download datasheet 9DBV0541 Datasheet
Additional preview pages of the 9DBV0541 datasheet.

📁 Similar Datasheet

  • 9DBV0541 - 5 to 9-Output 1.8V Low-Power Buffers (Renesas)
  • 9DBV0531 - 5 to 9-Output 1.8V Low-Power Buffers (Renesas)
  • 9DBV0231 - 2-Output 1.8V PCIe Zero-Delay/Fanout Clock Buffer (Renesas)
  • 9DBV0431 - Zero-delay/Fanout Buffer (Renesas)
  • 9DBV0441 - 1.8V PCIe Gen1-4 ZDB/FOB (Renesas)
  • 9DBV0631 - 6-Output 1.8V PCIe Zero-Delay/Fanout Clock Buffer (Renesas)
  • 9DBV0641 - 6-Output 1.8V PCIe Zero-Delay/Fanout Clock Buffer (Renesas)
  • 9DBV0731 - 5 to 9-Output 1.8V Low-Power Buffers (Renesas)
  • 9DBV0741 - 5 to 9-Output 1.8V Low-Power Buffers (Renesas)
  • 9DBV0841 - PCIe Gen1-4 Buffer (Renesas)
Other Datasheets by IDT
  • 9DBV0531 - 5-output 1.8V HCSL Fanout Buffer
  • 9DBV0231 - 2-output 1.8V PCIe Gen1/2/3 Zero Delay / Fanout Buffer
  • 9DBV0241 - 2-Output 1.8V PCIe Gen1-2-3 Zero Delay / Fanout Buffer
  • 9DBV0431 - 4-output 1.8V PCIe Gen1-2-3 Zero-delay/Fanout Buffer
  • 9DBV0441 - 4 O/P 1.8V PCIe Gen1-2-3 ZDB/FOB
  • 9DBV0631 - 6-output 1.8V PCIe Gen1-2-3 ZDB/FOB
  • 9DBV0641 - Clock Buffer
  • 9DBV0731 - 7-output 1.8V HCSL Fanout Buffer

Full PDF Text Transcription

Click to expand full text
5 O/P 1.8V PCIe Gen1-2-3 Fan-out Buffer w/Zo=100ohms 9DBV0541 DATASHEET Description The 9DBV0541 is a member of IDT's 1.8V Very-Low-Power (VLP) PCIe family. It has integrated terminations for direct connection to 100ohm transmission lines. The device has 5 output enables for clock management, and 3 selectable SMBus addresses. Recommended Application 1.
Published: |