854S006I - Differential-to-LVDS Fanout Buffer

Product Overview

IDT

Part number	854S006I
Manufacturer	IDT
File Size	211.46 KB
Description	Differential-to-LVDS Fanout Buffer
Datasheet	854S006I Datasheet
Additional preview pages of the 854S006I datasheet.

The 854S006I is a low skew, high perfor- mance 1-to-6 Differential-to-LVDS Fanout Buffer.

The CLK, nCLK pair can accept most standard differential input levels.

The 854S006I is characterized to operate from either a 2.5V or a 3.3V power supply.

Six differential LVDS outputs.
One differential clock input pair.
CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL.
Maximum output frequency: 1.7GHz.
Translates any single ended input signal to LVDS levels with resistor bias on nCLK input.
Output skew: 55ps (maximum).
Propagation delay: 850ps (maximum).
Additive phase jitter, RMS: 0.067ps (typical).
Full 3.3V or 2.

Other Datasheets by IDT

Published: Dec 21, 2016 |