Datasheet4U Logo Datasheet4U.com

844N255I - NG Crystal-to-LVDS Clock Synthesizer

Datasheet Summary

Description

The 844N255I is a 6-output clock synthesizer designed for wireless infrastructure clock applications.

Features

  • 4TH generation FemtoClock® NG technology.
  • Selectable 156.25MHz, 125MHz, 100MHz, 50MHz and 25MHz output clock signals synthesized from a 25MHz reference frequency.
  • Six differential LVDS clock outputs.
  • Crystal interface designed for a 25MHz crystal.
  • RMS phase jitter @ 156.25MHz, using a 25MHz crystal (1MHz - 20MHz): 0.27ps (typical).
  • Internal regulator for optimum noise rejection.
  • LVCMOS interface levels for the frequency select and o.

📥 Download Datasheet

Datasheet preview – 844N255I

Datasheet Details

Part number 844N255I
Manufacturer IDT
File Size 688.33 KB
Description NG Crystal-to-LVDS Clock Synthesizer
Datasheet download datasheet 844N255I Datasheet
Additional preview pages of the 844N255I datasheet.
Other Datasheets by IDT

Full PDF Text Transcription

Click to expand full text
FemtoClock® NG Crystal-to-LVDS Clock Synthesizer 844N255I Data Sheet General Description The 844N255I is a 6-output clock synthesizer designed for wireless infrastructure clock applications. The device uses IDT’s fourth generation FemtoClock® NG technology for an optimum of high clock frequency and low phase noise performance, combined with a low power consumption and high power supply noise rejection. The reference frequency is selectable and the following frequency is supported: 25MHz. The synthesizer generates selectable 156.25MHz, 125MHz, 100MHz, 50MHz and 25MHz clock signals. The device is optimized for very low phase noise and cycle to cycle jitter. The synthesized clock frequency and the phase-noise performance are optimized for driving SRIO 1.3 and 2.
Published: |