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Preliminary
PowerPC 405GPr Embedded Processor Data Sheet
Features
• IBM PowerPC 405 32-bit RISC processor core operating up to 400MHz with 16KB I- and D-caches • PC-133 synchronous DRAM (SDRAM) interface - 32-bit interface for non-ECC applications - 40-bit interface serves 32 bits of data plus 8 check bits for ECC applications • 4KB on-chip memory (OCM) • Programmable timers • External peripheral bus - Flash ROM/Boot ROM interface - Direct support for 8-, 16-, or 32-bit SRAM and external peripherals - Up to eight devices - External Mastering supported • DMA support for external peripherals, internal UART and memory - Scatter-gather chaining supported - Four channels • PCI Revision 2.
IBM25PPC405GPR Datasheet
